AD9461BSVZ

Product Summary

The AD9461BSVZ is a 16-bit, monolithic, sampling, analog-to-digital converter (ADC) with an on-chip track-and-hold circuit. It is optimized for performance, small size, and ease of use. The AD9461BSVZ operates up to 130 MSPS, providing a superior signal-to-noise ratio (SNR) for instrumentation, medical imaging, and radar receivers using baseband (<100 MHz) and IF frequencies. The applications of the AD9461BSVZ include MRI receivers, Multicarrier, multimode, cellular receivers, Antenna array positioning, Power amplifier linearization, Broadband wireless, Radar, Infrared imaging and Communications instrumentation.

Parametrics

AD9461BSVZ absolute maximum ratings: (1)AVDD1 to AGND: -0.3 V to +4 V; (2)AVDD2 to AGND: -0.3 V to +6 V; (3)DRVDD to DGND: -0.3 V to +4 V; (4)AGND to DGND: -0.3 V to +0.3 V; (5)AVDD1 to DRVDD: -4 V to +4 V; (6)AVDD2 to DRVDD: -4 V to +6 V; (7)AVDD2 to AVDD: -4 V to +6 V; (8)D0± through D15± to DGND: -0.3 V to DRVDD + 0.3 V; (9)CLK+/CLK- to AGND:–0.3 V to AVDD1 + 0.3 V; (10)OUTPUT MODE, DCS MODE, and DFS to AGND: –0.3 V to AVDD1 + 0.3 V ; (11)VIN+, VIN- to AGND: -0.3 V to AVDD2 + 0.3 V; (12)VREF to AGND: -0.3 V to AVDD1 + 0.3 V; (13)SENSE to AGND: -0.3 V to AVDD1 + 0.3 V; (14)REFT, REFB to AGND: -0.3 V to AVDD1 + 0.3 V; (15)Storage Temperature Range: -65℃ to +125℃; (16)Operating Temperature Range: -40℃ to +85℃; (17)Lead Temperature (Soldering 10 sec): 300℃; (18)Junction Temperature: 150℃.

Features

AD9461BSVZ features: (1)130 MSPS guaranteed sampling rate; (2)78.7 dBFS SNR/90 dBc SFDR with 10 MHz input (3.4 V p-p input, 130 MSPS); (3)77.7 dBFS SNR with 170.3 MHz input (4.0 V p-p input, 130 MSPS); (4)77.0 dBFS SNR/84 dBc SFDR with 170 MHz input (3.4 V p-p input, 130 MSPS); (5)76.3 dBFS SNR/86 dBc SFDR with 225 MHz input (3.4 V p-p input, 125 MSPS); (6)89 dBFS two-tone SFDR with 169 MHz and 170 MHz (130 MSPS); (7)60 fsec rms jitter; (8)Excellent linearity: DNL = ±0.6 LSB typical; INL = ±5.0 LSB typical; (9)2.0 V p-p to 4.0 V p-p differential full-scale input; (10)Buffered analog inputs; (11)LVDS outputs (ANSI-644 compatible) or CMOS outputs; (12)Data format select (offset binary or twos complement) Output clock available.

Diagrams